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and software.
ABOUT - FLEX LOGIX
MBA San Jose State. Abhijit has led the silicon implementation of EFLX eFPGA in 180nm, 40nm, 28nm, 16nm, 14nm, 12nm and now in design of 7nm and nnMAX inference in 16nm. Abhijit’s team is also in implementation of NMAX in 16nm. Over 20 years experience in silicon and system design at LTX then Rambus where he was Senior EngineeringDirector
EFPGA - FLEX LOGIX
Flex Logix has been doing eFPGA for 6 years. We have eFPGA proven in Silicon for Sandia 180nm, TSMC 40nm, TSMC 28/22nm, TSMC 16/12nm and GF 12nm. We are in design of GF 22FDX and will be starting on TSMC 7/6nm soon. We offer array sizes from 1K to >300K LUTs with DSP and BRAM options. We use the fewest metal layers so we are compatible with the CAREERS - FLEX LOGIX Work with super talented software developers and hardware engineers who have worked on numerous software projects and on high volume ICs on process nodes from 7nm to 180nm. Our products are multidisciplinary: our hardware and our software are co-designed and must work together well. We are leaders in embedded FPGA hardware andsoftware (like
MANAGEMENT & BOARD
BSc, Computer Science, University of Alberta. MBA Harvard. MSEE (coursework), Santa Clara University. 1979-1990 AMD, Senior VP, Microprocessors and Logic with >500 direct reports. 1990 joined 2 PhD founders as founding CEO to grow Rambus from 4 people to IPO to $2 Billion market cap, till 2005. Director of Everspin, the leading MRAMcompany.
DETERMINE INFERENCE EFFICIENCY USING TOPS, SRAM, DRAM AI Inference Efficiency = Throughput/TOPS, Throughput/DRAM & Throughput/SRAM MB AI + eFPGA ® Terminology •MAC = multiply and accumulate unit •TOPS = trillions or tera operations/second §TOPS is a measure of peak or maximum achievable performance FLEX LOGIX RAISES $55M SERIES D FINANCING AS IT models and generates the code to run InferX X1 without the detailed programming other solutions require.” About Mithril Capital Management Mithril is a global investment firm cofounded by Ajay Royanand Peter Thiel.
GF 22FDX® EFLX®4K IN DESIGN GF 12LP/12LP+ EFLX 4K Logic/DSP Cores www.flex-logix.com February 2021. Copyright 2014-2021 Flex Logix Technologies, Inc. The EFLX 4K Core has 632 input pins and 632 TSMC 12FFC+/FFC/16FFC+/FFC/FF+ EFLX®4K: SILICON … Title: Microsoft Word - 2020 02 EFLX4K TSMC16FF+FFCFFC+ 12FFCFFC+ product brief.docx Created Date: 2/25/2020 10:38:54 PM 2021 05 INFERENCE MARKETING MANAGER OR DIRECTOR Demonstrated cross-functional communication and relationship building skills Demonstrated experience managing key executive relationships across multiple functions and presenting to senior leaders and key partners Experience in a fast -growing, fast paced company and/or in the hightech sector BSEE/CS/CEUndergraduate degree required; MBApreferred
FLEX LOGIXINFERENCEEFPGANEWS & EVENTSABOUTCONTACT中文 InferX™ X1 is the fastest and most efficient Edge AI Inference Accelerator. Flex Logix™ is the leading provider of embedded FPGA IPand software.
ABOUT - FLEX LOGIX
MBA San Jose State. Abhijit has led the silicon implementation of EFLX eFPGA in 180nm, 40nm, 28nm, 16nm, 14nm, 12nm and now in design of 7nm and nnMAX inference in 16nm. Abhijit’s team is also in implementation of NMAX in 16nm. Over 20 years experience in silicon and system design at LTX then Rambus where he was Senior EngineeringDirector
EFPGA - FLEX LOGIX
Flex Logix has been doing eFPGA for 6 years. We have eFPGA proven in Silicon for Sandia 180nm, TSMC 40nm, TSMC 28/22nm, TSMC 16/12nm and GF 12nm. We are in design of GF 22FDX and will be starting on TSMC 7/6nm soon. We offer array sizes from 1K to >300K LUTs with DSP and BRAM options. We use the fewest metal layers so we are compatible with the CAREERS - FLEX LOGIX Work with super talented software developers and hardware engineers who have worked on numerous software projects and on high volume ICs on process nodes from 7nm to 180nm. Our products are multidisciplinary: our hardware and our software are co-designed and must work together well. We are leaders in embedded FPGA hardware andsoftware (like
MANAGEMENT & BOARD
BSc, Computer Science, University of Alberta. MBA Harvard. MSEE (coursework), Santa Clara University. 1979-1990 AMD, Senior VP, Microprocessors and Logic with >500 direct reports. 1990 joined 2 PhD founders as founding CEO to grow Rambus from 4 people to IPO to $2 Billion market cap, till 2005. Director of Everspin, the leading MRAMcompany.
DETERMINE INFERENCE EFFICIENCY USING TOPS, SRAM, DRAM AI Inference Efficiency = Throughput/TOPS, Throughput/DRAM & Throughput/SRAM MB AI + eFPGA ® Terminology •MAC = multiply and accumulate unit •TOPS = trillions or tera operations/second §TOPS is a measure of peak or maximum achievable performance FLEX LOGIX RAISES $55M SERIES D FINANCING AS IT models and generates the code to run InferX X1 without the detailed programming other solutions require.” About Mithril Capital Management Mithril is a global investment firm cofounded by Ajay Royanand Peter Thiel.
GF 22FDX® EFLX®4K IN DESIGN GF 12LP/12LP+ EFLX 4K Logic/DSP Cores www.flex-logix.com February 2021. Copyright 2014-2021 Flex Logix Technologies, Inc. The EFLX 4K Core has 632 input pins and 632 TSMC 12FFC+/FFC/16FFC+/FFC/FF+ EFLX®4K: SILICON … Title: Microsoft Word - 2020 02 EFLX4K TSMC16FF+FFCFFC+ 12FFCFFC+ product brief.docx Created Date: 2/25/2020 10:38:54 PM 2021 05 INFERENCE MARKETING MANAGER OR DIRECTOR Demonstrated cross-functional communication and relationship building skills Demonstrated experience managing key executive relationships across multiple functions and presenting to senior leaders and key partners Experience in a fast -growing, fast paced company and/or in the hightech sector BSEE/CS/CEUndergraduate degree required; MBApreferred
EFLX® EMBEDDED FPGA EFLX® Embedded FPGA Dense, Fast, Proven, Scalable Everything You Need for an eFPGA in Your SoC High density & high performance similar to commercial FPGA eFPGA Arrays of any size by tiling proven eFPGA IP cores to the size needed Mix Logic and DSP tiles to suit your needs. Integrate RAM between tiles New nnMAX™: eFPGA optimized for AI Inference Acceleration INFERENCE - FLEX LOGIX InferX X1 1KU pricing ranges from $99 to $199 depending on speed grade (Nvidia Xavier NX is $399). We want to expand the market and bring high performance inference to higher volume, lower price point systems so we are announcing 1MU (one million unit) pricing from $34 to $69 depending on speed grade. See the details in Cheng’s October 20th GF 22FDX® EFLX®4K IN DESIGN GF 12LP/12LP+ EFLX 4K Logic/DSP Cores www.flex-logix.com February 2021. Copyright 2014-2021 Flex Logix Technologies, Inc. The EFLX 4K Core has 632 input pins and 632INFERXX1 SOFTWARE
JEREMY ROBERSON APRIL 22, 2021 1 Jeremy RobersonLinley Fall Processor Conference, April 22nd 2021 InferXX1 Software Why Software is Criticalfor AI Inference
ACCELERATOR EVALUATION ON REAL EDGE-INFERENCE APPLICATIONS Accelerator Evaluation on Real Edge-Inference Applications Vinay Mehta, Inference Technical Marketing Manager Flex Logix Technologies, Inc. vmehta@flex-logix.com ENABLES CUSTOMERS TO DESIGN POWER SENSITIVE APPLICATIONS Title: Microsoft Word - 2020 01 27 Flex Logix PR - EFLX 1K eFPGA core on TSMC 40nm - TSMC FINAL.docx Created Date: 1/25/2020 5:39:49 PM 2021 05 INFERENCE MARKETING MANAGER OR DIRECTOR Demonstrated cross-functional communication and relationship building skills Demonstrated experience managing key executive relationships across multiple functions and presenting to senior leaders and key partners Experience in a fast -growing, fast paced company and/or in the hightech sector BSEE/CS/CEUndergraduate degree required; MBApreferred
GEN2 TSMC 28HPC/HPC+/22ULP EFLX®4K GEN 2 SILICON VALIDATED Title: Microsoft Word - 2020 02 EFLX4K TSMC28HPCHPC+ product brief.docx Created Date: 2/25/2020 10:42:46 PM HOW TO MODEL INFERENCE THROUGHPUT & EFFICIENCY Linley Fall Processor Conference October 23-24, 2019 How to Model Inference Throughput & Efficiency AI + eFPGA ® ResNet-50 throughput comparison TOPS (INT8) Number of DRAM ResNet-50 (batch=1) SEMIENGINEERING BLOG SemiEngineering Blog – 18 December 2018 For example, Nvidia Tesla T4 has a TDP (thermal design power) spec of 75W, this is a worst case number or close to worst case number.Skip to content
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SMART, FLEXIBLE SEMICONDUCTORS Flex Logix™ is the leading provider of embedded FPGA hard IP andsoftware.
Flex Logix now is launching Inference Acceleration for EdgeApplications.
INFERENCE
Top throughput on tough models. More throughput for less $ & less watts.Learn More
EFPGA
Accelerate workloads & make your SoC flexible for changing needs. _WELCOME DIALOG SEMICONDUCTOR!_Learn More
TECHNOLOGY
FLEX LOGIX™ TECHNOLOGY__
SUPERIOR INTERCONNECT Inference and eFPGA are both data flow architectures. A single inference layer can take over a billion multiply-accumulates. Flex Logix directly connects the compute and RAM resources into a data path, like an ASIC; then repeats this layer by layer. Flex Logix utilizes a new breakthrough interconnect architecture: less than half the silicon area of traditional mesh interconnect, fewer metal layers, higher utilization and higher performance. The ISSCC 2014 paper detailing this technology won the ISSCC Lewis Winner Award for Outstanding Paper. The interconnect continues to be improved resultingin new patents.
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SUPERIOR SCALABILITY We can easily scale up our Inference and eFPGA architectures to deliver compute capacity of any size. Flex Logix does this using a patented tiling architecture with interconnects at the edge of the tiles that automatically form a larger array of any size.__
TIGHTLY COUPLED SRAM AND COMPUTE SRAM closely couples with our compute tiles using another patented interconnect. Inference efficiency is achieved by closing coupling local SRAM with compute which is 100x more energy efficient than DRAM bandwidth. This interconnect is also useful for many eFPGAapplications.
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SUPERIOR SOFTWARE
Our eFPGA compiler has been in use by dozens of customers for several years. Our inference compiler takes Tensorflow Lite and ONNX models to program our inference architecture using our eFPGA compiler in the back end. A performance modeler for our inference architecture isavailable now.
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SOFTWARE DRIVER
Software drivers will be available for common Server OS and real time OS for MCUs and FPGAs.__
PCIE CARDS
Flex Logix chip products will be available in PCIe Card format for Edge Servers and Gateways. Other formats like U.2 or M.2 can besupplied as well.
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SUPERIOR LOW-POWER DESIGN METHODOLOGY Flex Logix has numerous architecture and circuit design technologies to deliver the highest throughput at the lower power. Reach out to our global representatives For Additional Technical Information and Software Evaluation DIRECTOR, JAPAN + KOREADr. Tohru Furuyama
Email: tfuruyama@flex-logix.comEUROPE
Mark De Souza, CamverTech Limited Telephone: +44 1628 566 596 Email: mark@camvertech.com Web: www.camvertech.comNORTH AMERICA
Contact us directly: info@flex-logix.com Quantum Leap Technical Sales San Jose, Dallas, Austin & Boston: Email: sales@quantumleapsales.com Web: www.quantumleapsales.comISRAEL
Moshe Stein, Amos Technologies Telephone: +972 54 531 9132 Email: moshe@amost.co.ilTAIWAN, TAIPEI
MaoJet Technology Corp. 6F-1, No. 32-1, Sung-Chiang Rd, Taipei 104,Taiwan
Telephone: 886-2-2567-7643 Email: sales@maojet.com.tw Web: www.maojet.com.twTAIWAN, HSINCHU
MaoJet Technology Corp.11F-1, No. 67, Tzu-Yu Road, Hsinchu 300, Taiwan Telephone: 886-3-542-6428 Email: sales@maojet.com.tw Web: www.maojet.com.twCHINA, SHANGHAI
Pinnacle Design Systems, Ltd. Rm 2043, 20/F Catic Building, 212 Jiangning Rd, Jing’an District, Shanghai, China 200041 Telephone: +86-21-22306756 Email: sales@pinnacle-ipcores.comCHINA, BEIJING
OnePass Solutions, Ltd RM1508 A15F Horizon International Tower No. 6 Zhicun Road, Haidian District Beijing, China Telephone: +86-10-8280-0719 Email: sales@ops-eda.com FLEX LOGIX™ TECHNOLOGIES, INC., 2465 Latham Street, Mountain View,CA 94040
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